Building blocks for sparse linear algebra on heterogeneous hardware

Georg Hager, Gerhard Wellein, Friedrich-Alexander Universität Erlangen-Nürnberg

It is a widely accepted presumption that future compute platforms will be more and more heterogeneous. Our goal is to provide building blocks for sparse linear algebra with a strong focus on efficient and resilient computation on modern hardware. By determining a unified and highly performant sparse matrix storage format for all relevant architectures we can easily and flexibly utilize different architectures concurrently for computing key operations like sparse matrix-vector multiplication. In order to address fault tolerance and and to exploit new levels of parallelism we suggest a generic and affinity-aware interface for defining and controlling asynchronous tasks. Within our prototype implementation we are able to provide a manageable but highly useful set of functions that ease the programmer's burden with implementing asynchronous communication, functional parallelism, and low-overhead scalable checkpointing.

Workshop: Exploiting Different Levels of Parallelism for Exascale Computing

as part of the ACM International Conference on Supercomputing - ICS 2014

Date

June 10, 2014

Venue

Bavarian Academy of Sciences, Munich

Contact

Miriam Mehl, miriam.mehl@ipvs.uni-stuttgart.de
Dirk Pflüger, dirk.pflueger@ipvs.uni-stuttgart.de